1. Field of the Invention
The present invention relates to a maximum likelihood decoding, and more particularly, to an apparatus for improving performance of Viterbi decoding by effectively detecting the peak value of an input signal using automatic threshold control (ACT) for detecting digital information of an input signal, and a method therefore.
2. Description of the Related Art
For increasing the recording density of a signal without a significant change in the characteristics of the conventional recording/reproducing system, technology relating to partial response maximum likelihood (PRML), including a Viterbi decoding process, has been advanced, and a lot of specific circuits have been suggested.
FIG. 1 is a block diagram of a digital recording/reproducing apparatus as an example of the PRML-4 system. In FIG. 1, analog video and audio signals are converted into digital data by first and second analog-to-digital (A/D) converters 110 and 120. The video data output from the first A/D converter 110 is compressed through a high-efficiency coding process by a video data encoder 130, and then output to an error correction encoder 150. The audio data output from the second A/D converter 120 is coded by an audio data encoder 140 to be suitable for recording, and then also output to the error correction encoder 150. The error correction encoder 150 mixes the video data output from the video data encoder 130 and the audio data output from the audio data encoder 140, and adds a parity to the data using an error correction code, e.g., Reed Solomon code, to output the error-correction-coded data to a recording encoder 160. The recording encoder 160 modulates the error-correction-coded data according to a predetermined modulation scheme to be suitable for the characteristics of a recording channel, equalizes the modulated data to compensate for nonlinearities in the recording process, and outputs the equalized result to a recording amplifier 170. The signal amplified by the recording amplifier 170 is recorded on a recording medium T by a recording head HD1.
The signal recorded on the recording medium T is reproduced by a playback head HD2, and then amplified by a playback amplifier 210. A data detector 220 detects video and audio data from the amplified signal. An error correction decoder 230 corrects errors in the video and audio data detected by the data detector 220, and outputs the error-correction-decoded video and audio data to a video data decoder 240 and an audio data decoder 250, respectively. The video data decoder 240 decodes the error-correction-decoded video data to output video data to be finally restored by a first digital-to-analog (D/A) converter 260. The audio data decoder 250 decodes the error-correction-decoded audio data to output audio data to be finally restored by the second D/A converter 270.
FIG. 2 is a detailed block diagram of the data detector shown in FIG. 1, for detecting the data by a digital method. In FIG. 2, an automatic gain control (AGC) amplifier 221 automatically controls the amplitude of a reproduced signal amplified by the playback amplifier 210 of FIG. 1 to have a constant level. A low-pass filter (LPF) 222 low-pass-filters the signal output from the AGC amplifier 221 to remove a high frequency component of noise overlapping with the signal in the output of the AGC amplifier 221. An A/D converter 223 converts the low-pass filtered signal into digital data, and an equalizer 224 compensates distortion in the waveform and amplitude of the digital data to output the result to a maximum likelihood decoder 225. A timing detector 226 detects the timing of the reproduced signal equalized by the equalizer 224 using a phase-locked loop (PLL) included therein, and outputs a driving clock which is required for the A/D converter 223, the equalizer 224 and the maximum likelihood decoder 225. A channel demodulator 227 demodulates the maximum-likelihood-decoded data output from the maximum likelihood decoder 225 based on a modulation scheme used for the modulation, and outputs the result to the error correction decoder 230 of FIG. 1.
Here, the maximum likelihood decoder 225 includes a Viterbi decoder for determining whether data detected at a given time is precise, or data which passed through a trellis diagram is correct. That is, the Viterbi decoder calculates metrics for each pass to select a surviving path, and stores information of the surviving path in a memory according to each state, thereby decoding the input data by the final surviving path data read out from the memory, having the same shape as the trellis diagram.
Also, a peak detector using a conventional automatic threshold control (ATC) is installed before the Viterbi decoder of the maximum likelihood decoder 225. When the states are binary, a peak value of the signal in the positive direction (hereinafter, "positive peak") and a peak value of the signal in the negative direction (hereinafter, "negative peak") basically correspond to the metrics. Thus, the peak detector enables the detection of the positive peak of the input signal for maintaining the level of that value as a new threshold to detect consecutive positive peaks, and for updating a threshold for detecting the negative peak. Here, in the same manner, the peak detector enables the detection of the negative peak of the input signal for maintaining the level of that value as a new threshold to detect consecutive negative peaks and for updating a threshold for detecting the positive peak.
An example of the above-mentioned peak detector is shown in FIG. 3. In FIG. 3, a positive peak value detector 225.2 with a comparator COMP1, and a negative peak value detector 225.3 with a comparator COMP2, simultaneously detect positive and negative peak values of the equalized signal output via an amplifier 225.1. That is, the positive and negative peak values of the output signal from the equalizer 224 of FIG. 2 are detected while maintaining an offset A which is a predetermined difference between threshold values T.sub.H and T.sub.L of the positive peak value detector 225.2 and the negative peak detector 225.3. Here, the offset A is equal to Vr+Vd, and updating the threshold values according to the input signal and maintaining the difference between the threshold values of the positive peak value detector 225.2 and the negative peak detector 225.3 with a constant offset is called "ATC".
The operation principle of the peak detector of FIG. 3 is shown in FIG. 4. That is, the positive peak value detector 225.2 has an output Hn of logic "1" when an input signal Vi output from the amplifier 225.1 is greater than the threshold value T.sub.H for the positive peak value detection (hereinafter simply referred to as "positive threshold value"), and of logic "0" otherwise. The negative peak value detector 225.3 has an output Ln of logic "1" when the input signal Vi is less than the threshold value T.sub.L for the negative peak value detection (hereinafter simply referred to as "negative threshold value"), and of logic "0" if otherwise.
As described above, if the positive peak value is detected, the detected value is maintained to be set as a new positive threshold value, and simultaneously the negative threshold value is updated to a value which is less than the positive threshold value by the offset A. The negative threshold value is updated to be less than the positive threshold by the offset A because the minimum distance of the metrics is determined when the negative peak value is detected following the positive peak value. In addition, a path of the trellis diagram is decided until a time point at which the previous positive peak value which is the nearest from the detected negative peak value was generated. That is, the path having the minimum metric is selected.
In the same manner, if the negative peak value is detected, the detected value is maintained to be set as a new negative threshold value, and simultaneously the positive threshold value is updated to a value which is greater than the threshold value by the offset A. The predetermined offset A between the negative and positive threshold values changes according to a peak-to-peak value of the input signal.
However, the peak detector of FIG. 3 detects the peak value of the input signal having digital information "+1", as an example, when digital information "+1" and "-1" of the input signal are alternately input, to set a new positive threshold value according to the detected peak value, and simultaneously updates a negative threshold value having an opposite polarity of the detected peak value. At this time, if the next input signal having signal information "-1" is input before the negative threshold value is completely updated, a data is detected by a threshold value which does not have a constant offset A. Thus, if the threshold value of the opposite polarity of the detected peak value is not updated completely at an intended time, a data detection error occurs, lowering performance of the Viterbi decoding. In addition, when the peak detector detects the input signal "0" as "1", the detection error can be corrected by a Viterbi decoder. However, if the input signal "1" is detected as "0", this detection error cannot be corrected by the Viterbi decoder. Thus, the data detection error influences the performance of the Viterbi decoding.